core.sys.linux.perf_event

attr.type

Generalized performance event event_id types, used by the attr.event_id parameter of the sys_perf_event_open() syscall:

Generalized hardware cache events:

{ L1-D, L1-I, LLC, ITLB, DTLB, BPU, NODE } x { read, write, prefetch } x { accesses, misses }

Special "software" events provided by the kernel, even if the hardware does not support performance events. These events measure various physical and sw events of the kernel (and allow the profiling of them as well):

Bits that can be set in attr.sample_type to request information in the overflow packets.

values to program into branch_sample_type when PERF_SAMPLE_BRANCH is set

If the user does not pass priv level information via branch_sample_type, the kernel uses the event's priv level. Branch and event priv levels do not have to match. Branch priv level is checked for permissions.

The branch types can be combined, however BRANCH_ANY covers all types of branches and therefore it supersedes all the other types.

Values to determine ABI of the registers dump.

The format of the data returned by read() on a perf event fd, as specified by attr.read_format:

struct read_format {
  { u64        value;
    { u64        time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED
    { u64        time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING
    { u64        id;           } && PERF_FORMAT_ID
  } && !PERF_FORMAT_GROUP

  { u64        nr;
    { u64        time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED
    { u64        time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING
    { u64        value;
      { u64    id;           } && PERF_FORMAT_ID
    }        cntr[nr];
  } && PERF_FORMAT_GROUP
};

Hardware event_id to monitor via a performance monitoring event:

@sample_max_stack: Max number of frame pointers in a callchain, should be < /proc/sys/kernel/perf_event_max_stack

Structure of the page that can be mapped via mmap

single taken branch record layout:

from: source instruction (may not always be a branch insn) to: branch target mispred: branch target was mispredicted predicted: branch target was predicted

support for mispred, predicted is optional. In case it is not supported mispred = predicted = 0.

in_tx: running in a hardware transaction abort: aborting a hardware transaction cycles: cycles from last branch (or 0 if not supported) type: branch type

sizeof first published struct

add: config2

add: branch_sample_type

add: sample_regs_user

add: sample_regs_intr

add: aux_watermark

Ioctls that can be done on a perf event fd:

Indicates that /proc/PID/maps parsing are truncated by time out.

PERF_RECORD_MISC_MMAP_DATA and PERF_RECORD_MISC_COMM_EXEC are used on different events so can reuse the same bit position. Ditto PERF_RECORD_MISC_SWITCH_OUT.

Indicates that the content of PERF_SAMPLE_IP points to the actual instruction that triggered the event. See also perf_event_attr::precise_ip.

Reserve the last bit to indicate some extended misc field

PERF_RECORD_AUX::flags bits record was truncated to fit

snapshot from overwrite mode

record contains gaps

sample collided with another

pid=cgroup id, per-cpu mode only

O_CLOEXEC

type of opcode (load/store/prefetch,code) not available

load instruction

store instruction

prefetch

code (execution)

not available

hit level

miss level

L1

Line Fill Buffer

L2

L3

Local DRAM

Remote DRAM (1 hop)

Remote DRAM (2 hops)

Remote Cache (1 hop)

Remote Cache (2 hops)

I/O memory

Uncached memory

Remote

L1

L2

L3

L4

Any cache

LFB

RAM

PMEM

N/A

not available

no snoop

snoop hit

snoop miss

snoop hit modified

forward

1 free

locked instruction not available

locked transaction

not available

hit level

miss level

L1

L2

Hardware Walker

OS fault handler